Semiconductor devices such as logic and memory devices are typically fabricated by a sequence of processing steps applied to a substrate or wafer. The various features and multiple structural levels of the semiconductor devices are formed by these processing steps. For example, lithography among others is one semiconductor fabrication process that involves generating a pattern on a semiconductor wafer. Additional examples of semiconductor fabrication processes include, but are not limited to, chemical-mechanical polishing, etch, deposition, and ion implantation. Multiple semiconductor devices may be fabricated on a single semiconductor wafer and then separated into individual semiconductor devices.
Inspection processes are used at various steps during a semiconductor manufacturing process to detect defects on wafers to promote higher yield. As design rules and process windows continue to shrink in size, inspection systems are required to capture a wider range of physical defects on wafer surfaces while maintaining high throughput.
Semiconductor devices are increasingly valued based on their energy efficiency, rather than speed alone. For example, energy efficient consumer products are more valuable because they operate at lower temperatures and for longer periods of time on a fixed battery power supply. In another example, energy efficient data servers are in demand to reduce their operating costs. As a result, there is a strong interest to reduce the energy consumption of semiconductor devices.
Leakage current through insulator layers is a major energy loss mechanism of semiconductor devices manufactured at the 65 nm technology node and below. In response, electronic designers and manufacturers are adopting new materials (e.g., hafnium silicate (HfSiO4), nitrided hafnium silicates (HfSiON), hafnium dioxide (HfO2), zirconium silicate (ZrSiO4), etc.) with higher dielectric constants than traditional materials (e.g., silicon dioxide). These “high-k” materials reduce leakage current and enable the manufacture of smaller sized transistors.
Along with the adoption of new dielectric materials, the need has arisen for measurement tools to characterize the dielectric properties and band structures of high-k materials early in the manufacturing process. More specifically, high throughput monitoring tools are required to monitor and control the deposition of high-k materials during wafer manufacture to ensure a high yield of finished wafers. Early detection of deposition problems is important because the deposition of high-k materials is an early process step of a lengthy and expensive manufacturing process. In some examples, a high-k material is deposited on a wafer at the beginning of a manufacturing process that takes over one month to complete.
In some examples, device performance over time is influenced by charge trapping centers located in high-K dielectric layers of gate dielectric stacks. Charge trapping centers are caused by structural or material imperfections, interface states, and other defect states. Spectroscopic ellipsometry (SE) is a non-invasive characterization technique suitable for identifying process-induced defects, such as charge trapping centers, during device fabrication. In high-throughput measurement applications, the SE measurement technique includes a parametric representation of a measured optical dispersion. The particular parameterization is selected to reduce the number of unknown parameters and decrease correlations among parameters.
In some examples, the modeled optical response of one or more high-K dielectric layers is based on a harmonic oscillator model. In principle, the harmonic oscillator model is capable of representing defect states. However, this model does not work for amorphous materials including high-K dielectrics. Moreover due to an indirect connection between model parameters and meaningful physical values (e.g., defect activation energy, number of defects etc.) the harmonic oscillator model is limited in its ability to effectively represent defect states in high-K layers.
In some other examples, a Tauc-Lorentz model or a Cody-Lorentz model is employed as described by way of example in A. S. Ferlauto et al., “Analytical model for the optical functions of amorphous semiconductors from the near-infrared to ultraviolet: Application in thin film photovoltaics,” J. Appl. Phys. 92, 2424 (2002), the subject matter of which is incorporated herein in its entirety. In these models, the imaginary part of the dielectric function is represented by a parameterized dispersion function, and the real part of the dielectric function is determined based on enforcement of Kramers-Kronig consistency. Model parameters (e.g., optical function parameters and thicknesses) are evaluated by fitting modeled spectra to measured spectra by numerical regression. The validity and limitations of the models are assessed by statistical evaluation of fitting quality and confidence limits of model parameters.
The Tauc-Lorenz and Cody-Lorentz models have been successfully applied to measurements of defect-free, high-K dielectric layers. However, these models are limited in their ability to characterize defects such as charge trapping centers. Defect states are evident in optical and transport measurements of high-K dielectric layers. However, the Tauc-Lorentz model and the Cody-Lorentz model, as presently constructed, do not sufficiently represent such states. Moreover, the Tauc-Lorentz model is unable to account for low energy absorption tails characteristic of the amorphous materials. In one example, described in N. V. Nguyen et al., “Sub-bandgap defect states in polycrystalline hafnium oxide and their suppression by admixture of silicon,” APL 87, 192903 (2005) and N. V. Nguyen et al., “Optical properties of Jet-Vapor-Deposited TiAlO and HfAlO determined by Vacuum Ultraviolet Spectroscopic Ellipsometry,” AIP Conf. Proc. 683, 181 (2003), the sum of three Tauc-Lorentz functions is used to describe near band-edge defects in HfO2 layers. However, these functions do not describe sharp middle gap peaks noticeable in the absorption spectra of high-K film stacks.
In some other examples, the optical response of one or more high-K dielectric layers is predicted based on a direct inversion method. These methods are described by way of example in J. Price et al., “Identification of interfacial defects in high-k gate stack films by spectroscopic ellipsometry,” J. Vac. Sci. Technol. B 27 (1), 310 (2009) and J. Price et al., “Identification of sub-band-gap absorption features at the HfO2/Si(100) interface via spectroscopic ellipsometry,” APL 91, 061925 (2007), the subject matter of each is incorporated herein in its entirety. Such methods have traditionally been employed when defects have a noticeable contribution to the optical response of the high-K layers. However, direct inversion methods are computationally burdensome, very sensitive to statistical measurement errors, and do not provide a physically based model of the measured structure (i.e., the optical functions do not satisfy the Kramers-Kronig consistency condition). As a result, the utility of direct inversion methods for high-throughput inspection and process control is limited.
Accordingly, it would be advantageous to develop high throughput methods and/or systems for characterizing high-k dielectric layers early in the manufacturing process. In particular, it would be advantageous to develop a robust, reliable, and stable approach to in-line SE metrology of gate stacks including high-K dielectrics.